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  parameter typ. max. units r jc junction-to-case ??? 2.2 r ja case-to-ambient (pcb mount)** ??? 50 c/w r ja junction-to-ambient ??? 110 thermal resistance 
1/11/05 www.irf.com 1 d-pak t o-252aa i-pak to-251aa  logic-level gate drive  ultra low on-resistance  surface mount (irlr2705)  straight lead (irlu2705)  advanced process technology  fast switching  fully avalanche rated fifth generation hexfets from international rectifier utilize advanced processing techniques to achieve the lowest possible on-resistance per silicon area. this benefit, combined with the fast switching speed and ruggedized device design that hexfet power mosfets are well known for, provides the designer with an extremely efficient device for use in a wide variety of applications. the d-pak is designed for surface mounting using vapor phase, infrared, or wave soldering techniques. the straight lead version (irfu series) is for through-hole mounting applications. power dissipation levels up to 1.5 watts are possible in typical surface mount applications.   
    
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%&'(( parameter max. units i d @ t c = 25c continuous drain current, v gs @ 10v 28 i d @ t c = 100c continuous drain current, v gs @ 10v 20 a i dm pulsed drain current  110 p d @t c = 25c power dissipation 68 w linear derating factor 0.45 w/c v gs gate-to-source voltage 16 v e as single pulse avalanche energy  110 mj i ar avalanche current  16 a e ar repetitive avalanche energy  6.8 mj dv/dt peak diode recovery dv/dt  5.0 v/ns t j operating junction and -55 to + 175 t stg storage temperature range soldering temperature, for 10 seconds 300 (1.6mm from case ) c  
 
 lead-free s d g v dss = 55v r ds(on) = 0.040 ? i d = 28a 

2 www.irf.com s d g parameter min. typ. max. units conditions i s continuous source current mosfet symbol (body diode) ??? ??? showing the i sm pulsed source current integral reverse (body diode)  ??? ??? p-n junction diode. v sd diode forward voltage ??? ??? 1.3 v t j = 25c, i s = 17a, v gs = 0v  t rr reverse recovery time ??? 76 110 ns t j = 25c, i f = 16a q rr reverse recovery charge ??? 190 290 nc di/dt = 100a/s   t on forward turn-on time intrinsic turn-on time is negligible (turn-on is dominated by l s +l d ) source-drain ratings and characteristics 28 110 &  v dd = 25v, starting t j = 25c, l = 610h r g = 25 ? , i as = 16a. (see figure 12)   repetitive rating; pulse width limited by max. junction temperature. ( see fig. 11 )  pulse width 300s; duty cycle 2%.  this is applied for i-pak, l s of d-pak is measured between lead and center of die contact.  uses irlz34n data and test conditions.  i sd 16a, di/dt 270a/s, v dd v (br)dss , t j 175c notes: parameter min. typ. max. units conditions v (br)dss drain-to-source breakdown voltage 55 ??? ??? v v gs = 0v, i d = 250a ? v (br)dss / ? t j breakdown voltage temp. coefficient ??? 0.065 ??? v/c reference to 25c, i d = 1ma ??? ??? 0.040 v gs = 10v, i d = 17a  ??? ??? 0.051 w v gs = 5.0v, i d = 17a  ??? ??? 0.065 v gs = 4.0v, i d = 14a  v gs(th) gate threshold voltage 1.0 ??? 2.0 v v ds = v gs , i d = 250a g fs forward transconductance 11 ??? ??? s v ds = 25v, i d = 16a  ??? ??? 25 a v ds = 55v, v gs = 0v ??? ??? 250 v ds = 44v, v gs = 0v, t j = 150c gate-to-source forward leakage ??? ??? 100 na v gs = 16v gate-to-source reverse leakage ??? ??? -100 v gs = -16v q g total gate charge ??? ??? 25 i d = 16a q gs gate-to-source charge ??? ??? 5.2 nc v ds = 44v q gd gate-to-drain ("miller") charge ??? ??? 14 v gs = 5.0v, see fig. 6 and 13  t d(on) turn-on delay time ??? 8.9 ??? v dd = 28v t r rise time ??? 100 ??? ns i d = 16a t d(off) turn-off delay time ??? 21 ??? r g = 6.5 ?, v gs = 5.0v t f fall time ??? 29 ??? r d = 1.8 ?, see fig. 10   between lead, 6mm (0.25in.) from package and center of die contact  c iss input capacitance ??? 880 ??? v gs = 0v c oss output capacitance ??? 220 ??? pf v ds = 25v c rss reverse transfer capacitance ??? 94 ??? ? = 1.0mhz, see fig. 5  electrical characteristics @ t j = 25c (unless otherwise specified) nh i gss s d g l s internal source inductance ??? 7.5 ??? r ds(on) static drain-to-source on-resistance l d internal drain inductance )))  4.5 ))) i dss drain-to-source leakage current   caculated continuous current based on maximum allowable junction temperature; package limitation current = 20a.

www.irf.com 3 fig 4. normalized on-resistance vs. temperature fig 2. typical output characteristics fig 1. typical output characteristics fig 3. typical transfer characteristics 0.1 1 10 100 1000 0.1 1 10 10 0 i , drain-to-source current (a) d v , drain-to-source voltage (v) ds a 20s pulse width t = 175c vgs top 15v 12v 10v 8.0v 6.0v 4.0v 3.0v bottom 2.5v 2.5v j 0.1 1 10 100 1000 0.1 1 10 10 0 i , drain-to-source current (a) d v , drain-to-source voltage (v) ds a 20s pulse width t = 25c j vgs top 15v 12v 10v 8.0v 6.0v 4.0v 3.0v bot tom 2.5v 2.5v 0.1 1 10 100 1000 2345678910 t = 25c j gs v , gate-to-source voltage (v) d i , drain-to-source current (a) t = 175c j a v = 25v 20s pulse width ds 0.0 0.5 1.0 1.5 2.0 2.5 3.0 -60 -40 -20 0 20 40 60 80 100 120 140 160 180 j t , junction temperature (c) r , drain-to-source on resistance ds(on) (normalized) v = 10v gs a i = 27a d

4 www.irf.com fig 8. maximum safe operating area fig 6. typical gate charge vs. gate-to-source voltage fig 5. typical capacitance vs. drain-to-source voltage fig 7. typical source-drain diode forward voltage 0 200 400 600 800 1000 1200 1400 1 10 100 c, capacitance (pf) ds v , drain-to-source voltage (v) a v = 0v, f = 1mhz c = c + c , c shorted c = c c = c + c gs iss gs gd ds rss gd oss ds gd c iss c oss c rss 0 3 6 9 12 15 0 4 8 12 16 20 24 28 32 q , total gate charge (nc) g v , gate-to-source voltage (v) gs a for test circuit see figure 13 i = 16a v = 44v v = 28v d ds ds 1 10 100 1000 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2. 0 t = 25c j v = 0v gs v , source-to-drain voltage (v) i , reverse drain current (a) sd sd a t = 175c j 1 10 100 1000 1 10 100 v , drain-to-source voltage (v) ds i , drain current (a) operation in this area limited by r d ds(on) 10s 100s 1ms 10ms a t = 25c t = 175c single pulse c j

www.irf.com 5 fig 10a. switching time test circuit v ds 9 0% 1 0% v gs t d(on) t r t d(off) t f fig 10b. switching time waveforms *  
 1     0.1 %   *    + , - .* + - *  fig 11. maximum effective transient thermal impedance, junction-to-case fig 9. maximum drain current vs. case temperature 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 notes: 1. duty factor d = t / t 2. peak t = p x z + t 1 2 j dm thjc c p t t dm 1 2 t , rectangular pulse duration (sec) thermal response (z ) 1 thjc 0.01 0.02 0.05 0.10 0.20 d = 0.50 single pulse (thermal response) 25 50 75 100 125 150 175 0 5 10 15 20 25 30 t , case temperature ( c) i , drain current (a) c d limited by package

6 www.irf.com q g q gs q gd v g charge d.u.t. v d s i d i g 3ma v gs .3 f 50k ? .2 f 12v current regulator same type as d.u.t. current sampling resistors + -  fig 13b. gate charge test circuit fig 13a. basic gate charge waveform fig 12c. maximum avalanche energy vs. drain current fig 12b. unclamped inductive waveforms fig 12a. unclamped inductive test circuit t p v (br)dss i as r g i as 0.01 ? t p d.u.t l v ds + - v dd driver a 15v 20v 0 50 100 150 200 250 25 50 75 100 125 150 17 5 j e , single pulse avalanche energy (mj) as a starting t , junction temperature (c) v = 25v i top 6.6a 11a bottom 16a dd d

www.irf.com 7 p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop r e-applied v oltage reverse recovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period + - + + + - - - fig 14. for n-channel hexfets *  /.*"0$!01+1!  
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8 www.irf.com  

  

  
         12 in the assembly line "a" as s emble d on ww 16, 1999 example: wi t h as s e mb l y t his is an irfr120 lot code 1234 year 9 = 199 9 dat e code we e k 16 part number logo int ernat ional rectifier as s e mb l y lot code 916a irf u120 34 year 9 = 1999 dat e code or p = de s i gnat e s l e ad-f r e e product (optional) note: "p" in as s embly line pos ition indicates "l ead-f r ee" 12 34 we e k 16 a = assembly site code part number irf u120 line a logo lot code as s e mb l y int ernat ional rect ifier

www.irf.com 9  
   
          
  assembly example: with assembly this is an irfu120 year 9 = 199 9 dat e code line a week 19 in the assembly line "a" as s embled on ww 19, 1999 lot code 5678 part number 56 irf u 120 international logo rectifier lot code 919a 78 note: "p" in as s embly line pos ition indicates "l ead-f r ee"  56 78 assembly lot code rectifier logo international irf u120 part number week 19 dat e code year 9 = 1999 a = as s e mb l y s i t e code p = designates lead-free product (optional)

10 www.irf.com data and specifications subject to change without notice. ir world headquarters: 233 kansas st., el segundo, california 90245, usa tel: (310) 252-7105 tac fax: (310) 252-7903 visit us at www.irf.com for sales contact information . 01/05   

    
         tr 16.3 ( .641 ) 15.7 ( .619 ) 8.1 ( .318 ) 7.9 ( .312 ) 12.1 ( .476 ) 11.9 ( .469 ) feed direction feed direction 16.3 ( .641 ) 15.7 ( .619 ) trr trl n otes : 1 . controlling dimension : millimeter. 2 . all dimensions are shown in millimeters ( inches ). 3 . outline conforms to eia-481 & eia-541. notes : 1. outline conforms to eia-481. 16 mm 13 inch
note: for the most current drawings please refer to the ir website at: http://www.irf.com/package/


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